Industrial Collaboration : Assoc. Prof. Ir. Dr. Norlaili Mohd Noh

Assoc. Prof. Ir. Dr. Norlaili Mohd Noh

School of Electrical and Electronic Engineering, Universiti Sains Malaysia

Email: eelaili@usm.my

Phone No:(+6)04-599 6023

What is the proudest moment?

Prior to 2011, Silterra Sdn Bhd had always been a good supporter for the fabrication of chips from the research projects conducted in USM via its multipurpose project wafer (MPW). The chips designed from my PhD work benefitted from such support where silicon data from at least four designs were obtained for analysis and validity tests.

From December 2011 to November 2012, I was offered a 1-year attachment with Silterra. I took up the opportunity via the industrial, research and sabbatical leave granted by USM. The project was on "CMOS13 High Frequency Noise Characterisation and Modelling”. Besides conducting the project, I had also given classes on low noise amplifiers to the engineers in the device department. The contents of the classes were based on my PhD thesis.

The work on Silterra has initiated a grant proposal entitled "Development of High Frequency Noise Characterisation Methodology and Modelling for Wide Range RFCMOS Integrated Circuit Application”. The project was granted a RM305,280.00 support by CREST in 2013 and completed in November 2015. The team comprised six members from USM and two from Silterra. The outputs were one patent filing application, three ISI journal publications, one conference presentation and one MSc graduate. The patent was successfully granted in August 2020.

The patent from the first project had initiated a second project proposal with Silterra which was granted another RM557,096.62 support by CREST. The project, entitled "Design of Tunable Inductor and Transformer in CMOS Process for Multimode Low Power IoT Transceiver” was conducted from February 2018 until January 2021. The team comprised five members from USM, one member from UM and two members from Silterra. The outputs were one patent filing application, ten journal publications, three conference presentations, and one MSc + one PhD graduates.

Other project benefits from the collaborations above were the industrial experience and training on industrial related research for PhD and MSc graduates. Silterra had given monetary support for presentations in flagship conferences as well as award for publications in good and prestigious journals. CREST also supported final year projects (FYP) based on CREST's projects in the form of a one-off allowance to the FYP students.

Four students had benefitted from this scheme. More importantly, the FYP's involvements in industrial-relevant projects realised the concept of "from research to classroom”.

Transformer die

The collaborations with the industry had qualified me for professional registration (Chartered Engineer, CEng) with the UK Engineering Council in 2014 and the Board of Engineers Malaysia (BEM) (P.Eng./Ir.) in 2016. Professional registration of academic staff is very crucial for the accreditation of the undergraduate programmes in engineering schools. My proudest moment is when I reminiscence about the more than a decade long relationship with the people I work with in the industry. The collaborations were with the same people and team in Silterra.

This indicates that the researches were not only useful for the university and the integrated circuit research community, but also relevant for the semiconductor industry. I am thankful that the collaboration between the USM team and the Silterra team had always been positive from the beginning and had lasted more than a decade. I am also proud to have a young yet talented and dedicated USM member, Dr. Jagadheswaran Rajendran, working in the same team. It is good to have a young colleague in the team who is able to continue the fruitful collaboration, or start new ones, with the industries in the coming future.

Fabricated power amplifier (PA) with Transformer - Micrograph

What is the biggest challenge you faced to ensure the success of the project?

It was vital for us to establish and maintain a long-term trust between the university and industry. This included negotiating the content of the papers for publication and the patent to be submitted for filing. In addition, it was also important to ensure that the benefits gained from the project were fair for both the university and industry.

What is the future direction of the project ?

This work can be pursued by future RFIC designers in designing and enhancing the performances of the circuit using different techniques or ideas. The symmetrical impedance matching technique (which was submitted for patent filing) can be implemented in various RF circuits for performance enhancement. The tunability of the inductor and the wide band property of the symmetrical matching network technique can be employed for 5G circuits. The output of this work has led to new research projects in which the symmetrical matching network is being tested with other RF circuits such as the VCO. A continuous research and enhancement will be conducted in order to stay relevant with the global trends in the wireless system.

Photos after final prsentation with CREST on 11/5/2022